Gain Reduction

Macros
#define	ST25R3911B_REG_GAIN_REDUCTION_STATE_GS_PM0   BIT(0)
#define	ST25R3911B_REG_GAIN_REDUCTION_STATE_GS_PM1   BIT(1)
#define	ST25R3911B_REG_GAIN_REDUCTION_STATE_GS_PM2   BIT(2)
#define	ST25R3911B_REG_GAIN_REDUCTION_STATE_GS_PM3   BIT(3)
#define	ST25R3911B_REG_GAIN_REDUCTION_STATE_GS_AM0   BIT(4)
#define	ST25R3911B_REG_GAIN_REDUCTION_STATE_GS_AM1   BIT(5)
#define	ST25R3911B_REG_GAIN_REDUCTION_STATE_GS_AM2   BIT(6)
#define	ST25R3911B_REG_GAIN_REDUCTION_STATE_GS_AM3   BIT(7)

Detailed Description

State Register bits