Macros
#define	ST25R3911B_REG_REGULATOR_CTRL_MPSV0 BIT(1)

#define	ST25R3911B_REG_REGULATOR_CTRL_MPSV1 BIT(2)

#define	ST25R3911B_REG_REGULATOR_CTRL_MPSV_MASK (3 << 1)

#define	ST25R3911B_REG_REGULATOR_CTRL_MPSV_VDD (0 << 1)

#define	ST25R3911B_REG_REGULATOR_CTRL_MPSV_VSP_A (1 << 1)

#define	ST25R3911B_REG_REGULATOR_CTRL_MPSV_VSP_D (2 << 1)

#define	ST25R3911B_REG_REGULATOR_CTRL_MPSV_VSP_RF (3 << 1)

#define	ST25R3911B_REG_REGULATOR_CTRL_REGE0 BIT(3)

#define	ST25R3911B_REG_REGULATOR_CTRL_REGE2 BIT(4)

#define	ST25R3911B_REG_REGULATOR_CTRL_REGE3 BIT(5)

#define	ST25R3911B_REG_REGULATOR_CTRL_REG_S BIT(6)

Detailed Description

Control Register bits

Macros