8#ifndef ZEPHYR_INCLUDE_CACHE_H_
9#define ZEPHYR_INCLUDE_CACHE_H_
24#if defined(CONFIG_EXTERNAL_CACHE)
27#elif defined(CONFIG_ARCH_CACHE)
43#define _CPU DT_PATH(cpus, cpu_0)
55#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
68#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
81#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
94#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
110#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
127#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
144#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
161#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
178#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
195#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
222static ALWAYS_INLINE int z_impl_sys_cache_data_flush_range(
void *addr,
size_t size)
224#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
254#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
285static ALWAYS_INLINE int z_impl_sys_cache_data_invd_range(
void *addr,
size_t size)
287#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
318#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
349static ALWAYS_INLINE int z_impl_sys_cache_data_flush_and_invd_range(
void *addr,
size_t size)
351#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
382#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
409#ifdef CONFIG_DCACHE_LINE_SIZE_DETECT
411#elif (CONFIG_DCACHE_LINE_SIZE != 0)
412 return CONFIG_DCACHE_LINE_SIZE;
414 return DT_PROP_OR(_CPU, d_cache_line_size, 0);
436#ifdef CONFIG_ICACHE_LINE_SIZE_DETECT
438#elif (CONFIG_ICACHE_LINE_SIZE != 0)
439 return CONFIG_ICACHE_LINE_SIZE;
441 return DT_PROP_OR(_CPU, i_cache_line_size, 0);
460#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_CACHE_DOUBLEMAP)
484#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_CACHE_DOUBLEMAP)
513#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_CACHE_DOUBLEMAP)
516 return (__sparse_force
void __sparse_cache *)ptr;
538#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_CACHE_DOUBLEMAP)
541 return (__sparse_force
void *)ptr;
546#ifdef CONFIG_LIBMETAL
547static ALWAYS_INLINE void sys_cache_flush(
void *addr,
size_t size)
553#include <zephyr/syscalls/cache.h>
Public APIs for architectural cache controller drivers.
#define ALWAYS_INLINE
Definition common.h:129
Public APIs for external cache controller drivers.
#define cache_uncached_ptr(ptr)
Definition cache.h:349
#define cache_instr_invd_all
Definition cache.h:227
#define cache_cached_ptr(ptr)
Definition cache.h:346
#define cache_instr_disable
Definition cache.h:201
#define cache_is_ptr_uncached(ptr)
Definition cache.h:343
#define cache_instr_flush_all
Definition cache.h:214
#define cache_data_flush_and_invd_range(addr, size)
Definition cache.h:157
#define cache_instr_invd_range(addr, size)
Definition cache.h:287
#define cache_instr_flush_and_invd_all
Definition cache.h:240
#define cache_instr_enable
Definition cache.h:192
#define cache_instr_flush_range(addr, size)
Definition cache.h:263
#define cache_data_invd_range(addr, size)
Definition cache.h:132
#define cache_instr_flush_and_invd_range(addr, size)
Definition cache.h:311
#define cache_data_invd_all
Definition cache.h:72
#define cache_is_ptr_cached(ptr)
Definition cache.h:340
#define cache_data_flush_range(addr, size)
Definition cache.h:108
#define cache_data_flush_and_invd_all
Definition cache.h:85
#define cache_data_flush_all
Definition cache.h:59
#define cache_data_enable
Definition cache.h:37
#define cache_instr_line_size_get
Definition cache.h:332
#define cache_data_disable
Definition cache.h:46
#define cache_data_line_size_get
Definition cache.h:177
static ALWAYS_INLINE bool sys_cache_is_ptr_cached(void *ptr)
Test if a pointer is in cached region.
Definition cache.h:458
static ALWAYS_INLINE void * sys_cache_uncached_ptr_get(void *ptr)
Return uncached pointer to a RAM address.
Definition cache.h:536
static ALWAYS_INLINE int sys_cache_data_flush_all(void)
Flush the d-cache.
Definition cache.h:108
static ALWAYS_INLINE int sys_cache_instr_flush_and_invd_all(void)
Flush and Invalidate the i-cache.
Definition cache.h:193
static ALWAYS_INLINE size_t sys_cache_instr_line_size_get(void)
Get the i-cache line size.
Definition cache.h:434
static ALWAYS_INLINE void sys_cache_instr_disable(void)
Disable the i-cache.
Definition cache.h:92
int sys_cache_data_flush_and_invd_range(void *addr, size_t size)
Flush and Invalidate an address range in the d-cache.
int sys_cache_data_invd_range(void *addr, size_t size)
Invalidate an address range in the d-cache.
static ALWAYS_INLINE int sys_cache_instr_flush_range(void *addr, size_t size)
Flush an address range in the i-cache.
Definition cache.h:252
static ALWAYS_INLINE int sys_cache_instr_flush_all(void)
Flush the i-cache.
Definition cache.h:125
static ALWAYS_INLINE size_t sys_cache_data_line_size_get(void)
Get the d-cache line size.
Definition cache.h:407
int sys_cache_data_flush_range(void *addr, size_t size)
Flush an address range in the d-cache.
static ALWAYS_INLINE int sys_cache_instr_flush_and_invd_range(void *addr, size_t size)
Flush and Invalidate an address range in the i-cache.
Definition cache.h:380
static ALWAYS_INLINE void * sys_cache_cached_ptr_get(void *ptr)
Return cached pointer to a RAM address.
Definition cache.h:511
static ALWAYS_INLINE void sys_cache_data_disable(void)
Disable the d-cache.
Definition cache.h:66
static ALWAYS_INLINE int sys_cache_instr_invd_range(void *addr, size_t size)
Invalidate an address range in the i-cache.
Definition cache.h:316
static ALWAYS_INLINE void sys_cache_data_enable(void)
Enable the d-cache.
Definition cache.h:53
static ALWAYS_INLINE void sys_cache_instr_enable(void)
Enable the i-cache.
Definition cache.h:79
static ALWAYS_INLINE int sys_cache_data_invd_all(void)
Invalidate the d-cache.
Definition cache.h:142
static ALWAYS_INLINE bool sys_cache_is_ptr_uncached(void *ptr)
Test if a pointer is in un-cached region.
Definition cache.h:482
static ALWAYS_INLINE int sys_cache_data_flush_and_invd_all(void)
Flush and Invalidate the d-cache.
Definition cache.h:176
static ALWAYS_INLINE int sys_cache_instr_invd_all(void)
Invalidate the i-cache.
Definition cache.h:159
#define DT_PROP_OR(node_id, prop, default_value)
Like DT_PROP(), but with a fallback to default_value.
Definition devicetree.h:825
#define ENOTSUP
Unsupported value.
Definition errno.h:114