Zephyr API 3.6.99
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devicetree.h
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1/*
2 * Copyright (c) 2024, Ambiq Micro Inc. <www.ambiq.com>
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#ifndef ZEPHYR_INCLUDE_DRIVERS_MSPI_DEVICETREE_H_
8#define ZEPHYR_INCLUDE_DRIVERS_MSPI_DEVICETREE_H_
9
17#include <zephyr/drivers/gpio.h>
18
19#ifdef __cplusplus
20extern "C" {
21#endif
22
32#define MSPI_DEVICE_CONFIG_DT(mspi_dev) \
33 { \
34 .ce_num = DT_PROP_OR(mspi_dev, mspi_hardware_ce_num, 0), \
35 .freq = DT_PROP(mspi_dev, mspi_max_frequency), \
36 .io_mode = DT_ENUM_IDX_OR(mspi_dev, mspi_io_mode, \
37 MSPI_IO_MODE_SINGLE), \
38 .data_rate = DT_ENUM_IDX_OR(mspi_dev, mspi_data_rate, \
39 MSPI_DATA_RATE_SINGLE), \
40 .cpp = DT_ENUM_IDX_OR(mspi_dev, mspi_cpp_mode, MSPI_CPP_MODE_0), \
41 .endian = DT_ENUM_IDX_OR(mspi_dev, mspi_endian, \
42 MSPI_XFER_LITTLE_ENDIAN), \
43 .ce_polarity = DT_ENUM_IDX_OR(mspi_dev, mspi_ce_polarity, \
44 MSPI_CE_ACTIVE_LOW), \
45 .dqs_enable = DT_PROP(mspi_dev, mspi_dqs_enable), \
46 .rx_dummy = DT_PROP_OR(mspi_dev, rx_dummy, 0), \
47 .tx_dummy = DT_PROP_OR(mspi_dev, tx_dummy, 0), \
48 .read_cmd = DT_PROP_OR(mspi_dev, read_command, 0), \
49 .write_cmd = DT_PROP_OR(mspi_dev, write_command, 0), \
50 .cmd_length = DT_ENUM_IDX_OR(mspi_dev, command_length, 0), \
51 .addr_length = DT_ENUM_IDX_OR(mspi_dev, address_length, 0), \
52 .mem_boundary = COND_CODE_1(DT_NODE_HAS_PROP(mspi_dev, ce_break_config), \
53 (DT_PROP_BY_IDX(mspi_dev, ce_break_config, 0)), \
54 (0)), \
55 .time_to_break = COND_CODE_1(DT_NODE_HAS_PROP(mspi_dev, ce_break_config), \
56 (DT_PROP_BY_IDX(mspi_dev, ce_break_config, 1)), \
57 (0)), \
58 }
59
68#define MSPI_DEVICE_CONFIG_DT_INST(inst) MSPI_DEVICE_CONFIG_DT(DT_DRV_INST(inst))
69
79#define MSPI_XIP_CONFIG_DT_NO_CHECK(mspi_dev) \
80 { \
81 .enable = DT_PROP_BY_IDX(mspi_dev, xip_config, 0), \
82 .address_offset = DT_PROP_BY_IDX(mspi_dev, xip_config, 1), \
83 .size = DT_PROP_BY_IDX(mspi_dev, xip_config, 2), \
84 .permission = DT_PROP_BY_IDX(mspi_dev, xip_config, 3), \
85 }
86
96#define MSPI_XIP_CONFIG_DT(mspi_dev) \
97 COND_CODE_1(DT_NODE_HAS_PROP(mspi_dev, xip_config), \
98 (MSPI_XIP_CONFIG_DT_NO_CHECK(mspi_dev)), \
99 ({}))
100
109#define MSPI_XIP_CONFIG_DT_INST(inst) MSPI_XIP_CONFIG_DT(DT_DRV_INST(inst))
110
120#define MSPI_SCRAMBLE_CONFIG_DT_NO_CHECK(mspi_dev) \
121 { \
122 .enable = DT_PROP_BY_IDX(mspi_dev, scramble_config, 0), \
123 .address_offset = DT_PROP_BY_IDX(mspi_dev, scramble_config, 1), \
124 .size = DT_PROP_BY_IDX(mspi_dev, scramble_config, 2), \
125 }
126
136#define MSPI_SCRAMBLE_CONFIG_DT(mspi_dev) \
137 COND_CODE_1(DT_NODE_HAS_PROP(mspi_dev, scramble_config), \
138 (MSPI_SCRAMBLE_CONFIG_DT_NO_CHECK(mspi_dev)), \
139 ({}))
140
149#define MSPI_SCRAMBLE_CONFIG_DT_INST(inst) MSPI_SCRAMBLE_CONFIG_DT(DT_DRV_INST(inst))
150
160#define MSPI_DEVICE_ID_DT(mspi_dev) \
161 { \
162 .ce = MSPI_DEV_CE_GPIOS_DT_SPEC_GET(mspi_dev), \
163 .dev_idx = DT_REG_ADDR(mspi_dev), \
164 }
165
174#define MSPI_DEVICE_ID_DT_INST(inst) MSPI_DEVICE_ID_DT(DT_DRV_INST(inst))
175
176
214#define MSPI_DEV_CE_GPIOS_DT_SPEC_GET(mspi_dev) \
215 GPIO_DT_SPEC_GET_BY_IDX_OR(DT_BUS(mspi_dev), ce_gpios, DT_REG_ADDR(mspi_dev), {})
216
226#define MSPI_DEV_CE_GPIOS_DT_SPEC_INST_GET(inst) \
227 MSPI_DEV_CE_GPIOS_DT_SPEC_GET(DT_DRV_INST(inst))
228
229
240#define MSPI_CE_GPIOS_DT_SPEC_GET(node_id) \
241{ \
242 COND_CODE_1(DT_NODE_HAS_PROP(node_id, ce_gpios), \
243 (DT_FOREACH_PROP_ELEM_SEP(node_id, ce_gpios, GPIO_DT_SPEC_GET_BY_IDX, (,))), \
244 ()) \
245}
246
256#define MSPI_CE_GPIOS_DT_SPEC_INST_GET(inst) \
257 MSPI_CE_GPIOS_DT_SPEC_GET(DT_DRV_INST(inst))
258
297#define MSPI_CE_CONTROL_INIT(node_id, delay_) \
298 { \
299 .gpio = MSPI_DEV_CE_GPIOS_DT_SPEC_GET(node_id), .delay = (delay_), \
300 }
301
315#define MSPI_CE_CONTROL_INIT_INST(inst, delay_) MSPI_CE_CONTROL_INIT(DT_DRV_INST(inst), delay_)
316
317#ifdef __cplusplus
318}
319#endif
320
325#endif /* ZEPHYR_INCLUDE_DRIVERS_MSPI_DEVICETREE_H_ */
gpio.h
Public APIs for GPIO drivers.