Zephyr API 3.6.99
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PCIe Capabilities
Device Driver APIs » PCIe Host Interface

PCI & PCI Express Capabilities

From PCI Code and ID Assignment Specification Revision 1.11

#define PCI_CAP_ID_NULL   0x00U
 Null Capability.
 
#define PCI_CAP_ID_PM   0x01U
 Power Management.
 
#define PCI_CAP_ID_AGP   0x02U
 Accelerated Graphics Port.
 
#define PCI_CAP_ID_VPD   0x03U
 Vital Product Data.
 
#define PCI_CAP_ID_SLOTID   0x04U
 Slot Identification.
 
#define PCI_CAP_ID_MSI   0x05U
 Message Signalled Interrupts.
 
#define PCI_CAP_ID_CHSWP   0x06U
 CompactPCI HotSwap.
 
#define PCI_CAP_ID_PCIX   0x07U
 PCI-X.
 
#define PCI_CAP_ID_HT   0x08U
 HyperTransport.
 
#define PCI_CAP_ID_VNDR   0x09U
 Vendor-Specific.
 
#define PCI_CAP_ID_DBG   0x0AU
 Debug port.
 
#define PCI_CAP_ID_CCRC   0x0BU
 CompactPCI Central Resource Control.
 
#define PCI_CAP_ID_SHPC   0x0CU
 PCI Standard Hot-Plug Controller.
 
#define PCI_CAP_ID_SSVID   0x0DU
 Bridge subsystem vendor/device ID.
 
#define PCI_CAP_ID_AGP3   0x0EU
 AGP 8x.
 
#define PCI_CAP_ID_SECDEV   0x0FU
 Secure Device.
 
#define PCI_CAP_ID_EXP   0x10U
 PCI Express.
 
#define PCI_CAP_ID_MSIX   0x11U
 MSI-X.
 
#define PCI_CAP_ID_SATA   0x12U
 Serial ATA Data/Index Configuration.
 
#define PCI_CAP_ID_AF   0x13U
 PCI Advanced Features.
 
#define PCI_CAP_ID_EA   0x14U
 PCI Enhanced Allocation.
 
#define PCI_CAP_ID_FPB   0x14U
 Flattening Portal Bridge.
 

PCI Express Extended Capabilities

#define PCIE_EXT_CAP_ID_NULL   0x0000U
 Null Capability.
 
#define PCIE_EXT_CAP_ID_ERR   0x0001U
 Advanced Error Reporting.
 
#define PCIE_EXT_CAP_ID_VC   0x0002U
 Virtual Channel when no MFVC.
 
#define PCIE_EXT_CAP_ID_DSN   0x0003U
 Device Serial Number.
 
#define PCIE_EXT_CAP_ID_PWR   0x0004U
 Power Budgeting.
 
#define PCIE_EXT_CAP_ID_RCLD   0x0005U
 Root Complex Link Declaration.
 
#define PCIE_EXT_CAP_ID_RCILC   0x0006U
 Root Complex Internal Link Control.
 
#define PCIE_EXT_CAP_ID_RCEC   0x0007U
 Root Complex Event Collector Endpoint Association.
 
#define PCIE_EXT_CAP_ID_MFVC   0x0008U
 Multi-Function VC Capability.
 
#define PCIE_EXT_CAP_ID_MFVC_VC   0x0009U
 Virtual Channel used with MFVC.
 
#define PCIE_EXT_CAP_ID_RCRB   0x000AU
 Root Complex Register Block.
 
#define PCIE_EXT_CAP_ID_VNDR   0x000BU
 Vendor-Specific Extended Capability.
 
#define PCIE_EXT_CAP_ID_CAC   0x000CU
 Config Access Correlation - obsolete.
 
#define PCIE_EXT_CAP_ID_ACS   0x000DU
 Access Control Services.
 
#define PCIE_EXT_CAP_ID_ARI   0x000EU
 Alternate Routing-ID Interpretation.
 
#define PCIE_EXT_CAP_ID_ATS   0x000FU
 Address Translation Services.
 
#define PCIE_EXT_CAP_ID_SRIOV   0x0010U
 Single Root I/O Virtualization.
 
#define PCIE_EXT_CAP_ID_MRIOV   0x0011U
 Multi Root I/O Virtualization.
 
#define PCIE_EXT_CAP_ID_MCAST   0x0012U
 Multicast.
 
#define PCIE_EXT_CAP_ID_PRI   0x0013U
 Page Request Interface.
 
#define PCIE_EXT_CAP_ID_AMD_XXX   0x0014U
 Reserved for AMD.
 
#define PCIE_EXT_CAP_ID_REBAR   0x0015U
 Resizable BAR.
 
#define PCIE_EXT_CAP_ID_DPA   0x0016U
 Dynamic Power Allocation.
 
#define PCIE_EXT_CAP_ID_TPH   0x0017U
 TPH Requester.
 
#define PCIE_EXT_CAP_ID_LTR   0x0018U
 Latency Tolerance Reporting.
 
#define PCIE_EXT_CAP_ID_SECPCI   0x0019U
 Secondary PCIe Capability.
 
#define PCIE_EXT_CAP_ID_PMUX   0x001AU
 Protocol Multiplexing.
 
#define PCIE_EXT_CAP_ID_PASID   0x001BU
 Process Address Space ID.
 
#define PCIE_EXT_CAP_ID_DPC   0x001DU
 DPC: Downstream Port Containment.
 
#define PCIE_EXT_CAP_ID_L1SS   0x001EU
 L1 PM Substates.
 
#define PCIE_EXT_CAP_ID_PTM   0x001FU
 Precision Time Measurement.
 
#define PCIE_EXT_CAP_ID_DVSEC   0x0023U
 Designated Vendor-Specific Extended Capability.
 
#define PCIE_EXT_CAP_ID_DLF   0x0025U
 Data Link Feature.
 
#define PCIE_EXT_CAP_ID_PL_16GT   0x0026U
 Physical Layer 16.0 GT/s.
 
#define PCIE_EXT_CAP_ID_LMR   0x0027U
 Lane Margining at the Receiver.
 
#define PCIE_EXT_CAP_ID_HID   0x0028U
 Hierarchy ID.
 
#define PCIE_EXT_CAP_ID_NPEM   0x0029U
 Native PCIe Enclosure Management.
 
#define PCIE_EXT_CAP_ID_PL_32GT   0x002AU
 Physical Layer 32.0 GT/s.
 
#define PCIE_EXT_CAP_ID_AP   0x002BU
 Alternate Protocol.
 
#define PCIE_EXT_CAP_ID_SFI   0x002CU
 System Firmware Intermediary.
 

Detailed Description

Macro Definition Documentation

◆ PCI_CAP_ID_AF

#define PCI_CAP_ID_AF   0x13U

#include <zephyr/drivers/pcie/cap.h>

PCI Advanced Features.

◆ PCI_CAP_ID_AGP

#define PCI_CAP_ID_AGP   0x02U

#include <zephyr/drivers/pcie/cap.h>

Accelerated Graphics Port.

◆ PCI_CAP_ID_AGP3

#define PCI_CAP_ID_AGP3   0x0EU

#include <zephyr/drivers/pcie/cap.h>

AGP 8x.

◆ PCI_CAP_ID_CCRC

#define PCI_CAP_ID_CCRC   0x0BU

#include <zephyr/drivers/pcie/cap.h>

CompactPCI Central Resource Control.

◆ PCI_CAP_ID_CHSWP

#define PCI_CAP_ID_CHSWP   0x06U

#include <zephyr/drivers/pcie/cap.h>

CompactPCI HotSwap.

◆ PCI_CAP_ID_DBG

#define PCI_CAP_ID_DBG   0x0AU

#include <zephyr/drivers/pcie/cap.h>

Debug port.

◆ PCI_CAP_ID_EA

#define PCI_CAP_ID_EA   0x14U

#include <zephyr/drivers/pcie/cap.h>

PCI Enhanced Allocation.

◆ PCI_CAP_ID_EXP

#define PCI_CAP_ID_EXP   0x10U

#include <zephyr/drivers/pcie/cap.h>

PCI Express.

◆ PCI_CAP_ID_FPB

#define PCI_CAP_ID_FPB   0x14U

#include <zephyr/drivers/pcie/cap.h>

Flattening Portal Bridge.

◆ PCI_CAP_ID_HT

#define PCI_CAP_ID_HT   0x08U

#include <zephyr/drivers/pcie/cap.h>

HyperTransport.

◆ PCI_CAP_ID_MSI

#define PCI_CAP_ID_MSI   0x05U

#include <zephyr/drivers/pcie/cap.h>

Message Signalled Interrupts.

◆ PCI_CAP_ID_MSIX

#define PCI_CAP_ID_MSIX   0x11U

#include <zephyr/drivers/pcie/cap.h>

MSI-X.

◆ PCI_CAP_ID_NULL

#define PCI_CAP_ID_NULL   0x00U

#include <zephyr/drivers/pcie/cap.h>

Null Capability.

◆ PCI_CAP_ID_PCIX

#define PCI_CAP_ID_PCIX   0x07U

#include <zephyr/drivers/pcie/cap.h>

PCI-X.

◆ PCI_CAP_ID_PM

#define PCI_CAP_ID_PM   0x01U

#include <zephyr/drivers/pcie/cap.h>

Power Management.

◆ PCI_CAP_ID_SATA

#define PCI_CAP_ID_SATA   0x12U

#include <zephyr/drivers/pcie/cap.h>

Serial ATA Data/Index Configuration.

◆ PCI_CAP_ID_SECDEV

#define PCI_CAP_ID_SECDEV   0x0FU

#include <zephyr/drivers/pcie/cap.h>

Secure Device.

◆ PCI_CAP_ID_SHPC

#define PCI_CAP_ID_SHPC   0x0CU

#include <zephyr/drivers/pcie/cap.h>

PCI Standard Hot-Plug Controller.

◆ PCI_CAP_ID_SLOTID

#define PCI_CAP_ID_SLOTID   0x04U

#include <zephyr/drivers/pcie/cap.h>

Slot Identification.

◆ PCI_CAP_ID_SSVID

#define PCI_CAP_ID_SSVID   0x0DU

#include <zephyr/drivers/pcie/cap.h>

Bridge subsystem vendor/device ID.

◆ PCI_CAP_ID_VNDR

#define PCI_CAP_ID_VNDR   0x09U

#include <zephyr/drivers/pcie/cap.h>

Vendor-Specific.

◆ PCI_CAP_ID_VPD

#define PCI_CAP_ID_VPD   0x03U

#include <zephyr/drivers/pcie/cap.h>

Vital Product Data.

◆ PCIE_EXT_CAP_ID_ACS

#define PCIE_EXT_CAP_ID_ACS   0x000DU

#include <zephyr/drivers/pcie/cap.h>

Access Control Services.

◆ PCIE_EXT_CAP_ID_AMD_XXX

#define PCIE_EXT_CAP_ID_AMD_XXX   0x0014U

#include <zephyr/drivers/pcie/cap.h>

Reserved for AMD.

◆ PCIE_EXT_CAP_ID_AP

#define PCIE_EXT_CAP_ID_AP   0x002BU

#include <zephyr/drivers/pcie/cap.h>

Alternate Protocol.

◆ PCIE_EXT_CAP_ID_ARI

#define PCIE_EXT_CAP_ID_ARI   0x000EU

#include <zephyr/drivers/pcie/cap.h>

Alternate Routing-ID Interpretation.

◆ PCIE_EXT_CAP_ID_ATS

#define PCIE_EXT_CAP_ID_ATS   0x000FU

#include <zephyr/drivers/pcie/cap.h>

Address Translation Services.

◆ PCIE_EXT_CAP_ID_CAC

#define PCIE_EXT_CAP_ID_CAC   0x000CU

#include <zephyr/drivers/pcie/cap.h>

Config Access Correlation - obsolete.

◆ PCIE_EXT_CAP_ID_DLF

#define PCIE_EXT_CAP_ID_DLF   0x0025U

#include <zephyr/drivers/pcie/cap.h>

Data Link Feature.

◆ PCIE_EXT_CAP_ID_DPA

#define PCIE_EXT_CAP_ID_DPA   0x0016U

#include <zephyr/drivers/pcie/cap.h>

Dynamic Power Allocation.

◆ PCIE_EXT_CAP_ID_DPC

#define PCIE_EXT_CAP_ID_DPC   0x001DU

#include <zephyr/drivers/pcie/cap.h>

DPC: Downstream Port Containment.

◆ PCIE_EXT_CAP_ID_DSN

#define PCIE_EXT_CAP_ID_DSN   0x0003U

#include <zephyr/drivers/pcie/cap.h>

Device Serial Number.

◆ PCIE_EXT_CAP_ID_DVSEC

#define PCIE_EXT_CAP_ID_DVSEC   0x0023U

#include <zephyr/drivers/pcie/cap.h>

Designated Vendor-Specific Extended Capability.

◆ PCIE_EXT_CAP_ID_ERR

#define PCIE_EXT_CAP_ID_ERR   0x0001U

#include <zephyr/drivers/pcie/cap.h>

Advanced Error Reporting.

◆ PCIE_EXT_CAP_ID_HID

#define PCIE_EXT_CAP_ID_HID   0x0028U

#include <zephyr/drivers/pcie/cap.h>

Hierarchy ID.

◆ PCIE_EXT_CAP_ID_L1SS

#define PCIE_EXT_CAP_ID_L1SS   0x001EU

#include <zephyr/drivers/pcie/cap.h>

L1 PM Substates.

◆ PCIE_EXT_CAP_ID_LMR

#define PCIE_EXT_CAP_ID_LMR   0x0027U

#include <zephyr/drivers/pcie/cap.h>

Lane Margining at the Receiver.

◆ PCIE_EXT_CAP_ID_LTR

#define PCIE_EXT_CAP_ID_LTR   0x0018U

#include <zephyr/drivers/pcie/cap.h>

Latency Tolerance Reporting.

◆ PCIE_EXT_CAP_ID_MCAST

#define PCIE_EXT_CAP_ID_MCAST   0x0012U

#include <zephyr/drivers/pcie/cap.h>

Multicast.

◆ PCIE_EXT_CAP_ID_MFVC

#define PCIE_EXT_CAP_ID_MFVC   0x0008U

#include <zephyr/drivers/pcie/cap.h>

Multi-Function VC Capability.

◆ PCIE_EXT_CAP_ID_MFVC_VC

#define PCIE_EXT_CAP_ID_MFVC_VC   0x0009U

#include <zephyr/drivers/pcie/cap.h>

Virtual Channel used with MFVC.

◆ PCIE_EXT_CAP_ID_MRIOV

#define PCIE_EXT_CAP_ID_MRIOV   0x0011U

#include <zephyr/drivers/pcie/cap.h>

Multi Root I/O Virtualization.

◆ PCIE_EXT_CAP_ID_NPEM

#define PCIE_EXT_CAP_ID_NPEM   0x0029U

#include <zephyr/drivers/pcie/cap.h>

Native PCIe Enclosure Management.

◆ PCIE_EXT_CAP_ID_NULL

#define PCIE_EXT_CAP_ID_NULL   0x0000U

#include <zephyr/drivers/pcie/cap.h>

Null Capability.

◆ PCIE_EXT_CAP_ID_PASID

#define PCIE_EXT_CAP_ID_PASID   0x001BU

#include <zephyr/drivers/pcie/cap.h>

Process Address Space ID.

◆ PCIE_EXT_CAP_ID_PL_16GT

#define PCIE_EXT_CAP_ID_PL_16GT   0x0026U

#include <zephyr/drivers/pcie/cap.h>

Physical Layer 16.0 GT/s.

◆ PCIE_EXT_CAP_ID_PL_32GT

#define PCIE_EXT_CAP_ID_PL_32GT   0x002AU

#include <zephyr/drivers/pcie/cap.h>

Physical Layer 32.0 GT/s.

◆ PCIE_EXT_CAP_ID_PMUX

#define PCIE_EXT_CAP_ID_PMUX   0x001AU

#include <zephyr/drivers/pcie/cap.h>

Protocol Multiplexing.

◆ PCIE_EXT_CAP_ID_PRI

#define PCIE_EXT_CAP_ID_PRI   0x0013U

#include <zephyr/drivers/pcie/cap.h>

Page Request Interface.

◆ PCIE_EXT_CAP_ID_PTM

#define PCIE_EXT_CAP_ID_PTM   0x001FU

#include <zephyr/drivers/pcie/cap.h>

Precision Time Measurement.

◆ PCIE_EXT_CAP_ID_PWR

#define PCIE_EXT_CAP_ID_PWR   0x0004U

#include <zephyr/drivers/pcie/cap.h>

Power Budgeting.

◆ PCIE_EXT_CAP_ID_RCEC

#define PCIE_EXT_CAP_ID_RCEC   0x0007U

#include <zephyr/drivers/pcie/cap.h>

Root Complex Event Collector Endpoint Association.

◆ PCIE_EXT_CAP_ID_RCILC

#define PCIE_EXT_CAP_ID_RCILC   0x0006U

#include <zephyr/drivers/pcie/cap.h>

Root Complex Internal Link Control.

◆ PCIE_EXT_CAP_ID_RCLD

#define PCIE_EXT_CAP_ID_RCLD   0x0005U

#include <zephyr/drivers/pcie/cap.h>

Root Complex Link Declaration.

◆ PCIE_EXT_CAP_ID_RCRB

#define PCIE_EXT_CAP_ID_RCRB   0x000AU

#include <zephyr/drivers/pcie/cap.h>

Root Complex Register Block.

◆ PCIE_EXT_CAP_ID_REBAR

#define PCIE_EXT_CAP_ID_REBAR   0x0015U

#include <zephyr/drivers/pcie/cap.h>

Resizable BAR.

◆ PCIE_EXT_CAP_ID_SECPCI

#define PCIE_EXT_CAP_ID_SECPCI   0x0019U

#include <zephyr/drivers/pcie/cap.h>

Secondary PCIe Capability.

◆ PCIE_EXT_CAP_ID_SFI

#define PCIE_EXT_CAP_ID_SFI   0x002CU

#include <zephyr/drivers/pcie/cap.h>

System Firmware Intermediary.

◆ PCIE_EXT_CAP_ID_SRIOV

#define PCIE_EXT_CAP_ID_SRIOV   0x0010U

#include <zephyr/drivers/pcie/cap.h>

Single Root I/O Virtualization.

◆ PCIE_EXT_CAP_ID_TPH

#define PCIE_EXT_CAP_ID_TPH   0x0017U

#include <zephyr/drivers/pcie/cap.h>

TPH Requester.

◆ PCIE_EXT_CAP_ID_VC

#define PCIE_EXT_CAP_ID_VC   0x0002U

#include <zephyr/drivers/pcie/cap.h>

Virtual Channel when no MFVC.

◆ PCIE_EXT_CAP_ID_VNDR

#define PCIE_EXT_CAP_ID_VNDR   0x000BU

#include <zephyr/drivers/pcie/cap.h>

Vendor-Specific Extended Capability.