Zephyr API 3.6.99
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pbuf.h
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1/*
2 * Copyright (c) 2023 Nordic Semiconductor ASA
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#ifndef ZEPHYR_INCLUDE_IPC_PBUF_H_
8#define ZEPHYR_INCLUDE_IPC_PBUF_H_
9
10#include <zephyr/cache.h>
11#include <zephyr/devicetree.h>
12
13#ifdef __cplusplus
14extern "C" {
15#endif
16
25#define PBUF_PACKET_LEN_SZ sizeof(uint32_t)
26
27/* Amount of data that is left unused to distinguish between empty and full. */
28#define _PBUF_IDX_SIZE sizeof(uint32_t)
29
30/* Minimal length of the data field in the buffer to store the smalest packet
31 * possible.
32 * (+1) for at least one byte of data.
33 * (+_PBUF_IDX_SIZE) to distinguish buffer full and buffer empty.
34 * Rounded up to keep wr/rd indexes pointing to aligned address.
35 */
36#define _PBUF_MIN_DATA_LEN ROUND_UP(PBUF_PACKET_LEN_SZ + 1 + _PBUF_IDX_SIZE, _PBUF_IDX_SIZE)
37
38#if defined(CONFIG_ARCH_POSIX)
39/* For the native simulated boards we need to modify some pointers at init */
40#define PBUF_MAYBE_CONST
41#else
42#define PBUF_MAYBE_CONST const
43#endif
44
49struct pbuf_cfg {
50 volatile uint32_t *rd_idx_loc; /* Address of the variable holding
51 * index value of the first valid byte
52 * in data[].
53 */
54 volatile uint32_t *wr_idx_loc; /* Address of the variable holding
55 * index value of the first free byte
56 * in data[].
57 */
58 uint32_t dcache_alignment; /* CPU data cache line size in bytes.
59 * Used for validation - TODO: To be
60 * replaced by flags.
61 */
62 uint32_t len; /* Length of data[] in bytes. */
63 uint8_t *data_loc; /* Location of the data[]. */
64};
65
72struct pbuf_data {
73 volatile uint32_t wr_idx; /* Index of the first holding first
74 * free byte in data[]. Used for
75 * writing.
76 */
77 volatile uint32_t rd_idx; /* Index of the first holding first
78 * valid byte in data[]. Used for
79 * reading.
80 */
81};
82
83
96struct pbuf {
97 PBUF_MAYBE_CONST struct pbuf_cfg *const cfg; /* Configuration of the
98 * buffer.
99 */
100 struct pbuf_data data; /* Data used to read and write
101 * to the buffer
102 */
103};
104
115#define PBUF_CFG_INIT(mem_addr, size, dcache_align) \
116{ \
117 .rd_idx_loc = (uint32_t *)(mem_addr), \
118 .wr_idx_loc = (uint32_t *)((uint8_t *)(mem_addr) + \
119 MAX(dcache_align, _PBUF_IDX_SIZE)), \
120 .data_loc = (uint8_t *)((uint8_t *)(mem_addr) + \
121 MAX(dcache_align, _PBUF_IDX_SIZE) + _PBUF_IDX_SIZE), \
122 .len = (uint32_t)((uint32_t)(size) - MAX(dcache_align, _PBUF_IDX_SIZE) - \
123 _PBUF_IDX_SIZE), \
124 .dcache_alignment = (dcache_align), \
125}
126
134#define PBUF_HEADER_OVERHEAD(dcache_align) \
135 (MAX(dcache_align, _PBUF_IDX_SIZE) + _PBUF_IDX_SIZE)
136
145#define PBUF_DEFINE(name, mem_addr, size, dcache_align) \
146 BUILD_ASSERT(dcache_align >= 0, \
147 "Cache line size must be non negative."); \
148 BUILD_ASSERT((size) > 0 && IS_PTR_ALIGNED_BYTES(size, _PBUF_IDX_SIZE), \
149 "Incorrect size."); \
150 BUILD_ASSERT(IS_PTR_ALIGNED_BYTES(mem_addr, MAX(dcache_align, _PBUF_IDX_SIZE)), \
151 "Misaligned memory."); \
152 BUILD_ASSERT(size >= (MAX(dcache_align, _PBUF_IDX_SIZE) + _PBUF_IDX_SIZE + \
153 _PBUF_MIN_DATA_LEN), "Insufficient size."); \
154 static PBUF_MAYBE_CONST struct pbuf_cfg cfg_##name = \
155 PBUF_CFG_INIT(mem_addr, size, dcache_align); \
156 static struct pbuf name = { \
157 .cfg = &cfg_##name, \
158 }
159
174int pbuf_tx_init(struct pbuf *pb);
175
190int pbuf_rx_init(struct pbuf *pb);
191
206int pbuf_write(struct pbuf *pb, const char *buf, uint16_t len);
207
224int pbuf_read(struct pbuf *pb, char *buf, uint16_t len);
225
230#ifdef __cplusplus
231}
232#endif
233
234#endif /* ZEPHYR_INCLUDE_IPC_PBUF_H_ */
cache API interface
Devicetree main header.
int pbuf_tx_init(struct pbuf *pb)
Initialize the Tx packet buffer.
int pbuf_read(struct pbuf *pb, char *buf, uint16_t len)
Read specified amount of data from the packet buffer.
int pbuf_rx_init(struct pbuf *pb)
Initialize the Rx packet buffer.
int pbuf_write(struct pbuf *pb, const char *buf, uint16_t len)
Write specified amount of data to the packet buffer.
#define PBUF_MAYBE_CONST
Definition pbuf.h:42
__UINT32_TYPE__ uint32_t
Definition stdint.h:90
__UINT8_TYPE__ uint8_t
Definition stdint.h:88
__UINT16_TYPE__ uint16_t
Definition stdint.h:89
Control block of packet buffer.
Definition pbuf.h:49
uint8_t * data_loc
Definition pbuf.h:63
uint32_t dcache_alignment
Definition pbuf.h:58
uint32_t len
Definition pbuf.h:62
volatile uint32_t * rd_idx_loc
Definition pbuf.h:50
volatile uint32_t * wr_idx_loc
Definition pbuf.h:54
Data block of the packed buffer.
Definition pbuf.h:72
volatile uint32_t wr_idx
Definition pbuf.h:73
volatile uint32_t rd_idx
Definition pbuf.h:77
Scure packed buffer.
Definition pbuf.h:96
const struct pbuf_cfg *const cfg
Definition pbuf.h:97
struct pbuf_data data
Definition pbuf.h:100