Zephyr API Documentation  3.6.99
A Scalable Open Source RTOS
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ite-intc.h File Reference

Go to the source code of this file.

Macros

#define IRQ_TYPE_NONE   0
 
#define IRQ_TYPE_EDGE_RISING   1
 
#define IRQ_TYPE_EDGE_FALLING   2
 
#define IRQ_TYPE_EDGE_BOTH   (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
 
#define IRQ_TYPE_LEVEL_HIGH   4
 
#define IRQ_TYPE_LEVEL_LOW   8
 
#define IT8XXX2_IRQ_WU20   1
 
#define IT8XXX2_IRQ_KBC_OBE   2
 
#define IT8XXX2_IRQ_SMB_D   4
 
#define IT8XXX2_IRQ_WKINTD   5
 
#define IT8XXX2_IRQ_WU23   6
 
#define IT8XXX2_IRQ_SMB_A   9
 
#define IT8XXX2_IRQ_SMB_B   10
 
#define IT8XXX2_IRQ_WU26   12
 
#define IT8XXX2_IRQ_WKINTC   13
 
#define IT8XXX2_IRQ_WU25   14
 
#define IT8XXX2_IRQ_SMB_C   16
 
#define IT8XXX2_IRQ_WU24   17
 
#define IT8XXX2_IRQ_WU22   21
 
#define IT8XXX2_IRQ_USB   23
 
#define IT8XXX2_IRQ_KBC_IBF   24
 
#define IT8XXX2_IRQ_PMC1_IBF   25
 
#define IT8XXX2_IRQ_PMC2_IBF   27
 
#define IT8XXX2_IRQ_TIMER1   30
 
#define IT8XXX2_IRQ_WU21   31
 
#define IT8XXX2_IRQ_WU50   40
 
#define IT8XXX2_IRQ_WU51   41
 
#define IT8XXX2_IRQ_WU52   42
 
#define IT8XXX2_IRQ_WU53   43
 
#define IT8XXX2_IRQ_WU54   44
 
#define IT8XXX2_IRQ_WU55   45
 
#define IT8XXX2_IRQ_WU56   46
 
#define IT8XXX2_IRQ_WU57   47
 
#define IT8XXX2_IRQ_WU60   48
 
#define IT8XXX2_IRQ_WU61   49
 
#define IT8XXX2_IRQ_WU62   50
 
#define IT8XXX2_IRQ_WU63   51
 
#define IT8XXX2_IRQ_WU64   52
 
#define IT8XXX2_IRQ_WU65   53
 
#define IT8XXX2_IRQ_WU66   54
 
#define IT8XXX2_IRQ_WU67   55
 
#define IT8XXX2_IRQ_TIMER2   58
 
#define IT8XXX2_IRQ_WU70   72
 
#define IT8XXX2_IRQ_WU71   73
 
#define IT8XXX2_IRQ_WU72   74
 
#define IT8XXX2_IRQ_WU73   75
 
#define IT8XXX2_IRQ_WU74   76
 
#define IT8XXX2_IRQ_WU75   77
 
#define IT8XXX2_IRQ_WU76   78
 
#define IT8XXX2_IRQ_WU77   79
 
#define IT8XXX2_IRQ_TIMER8   80
 
#define IT8XXX2_IRQ_WU88   85
 
#define IT8XXX2_IRQ_WU89   86
 
#define IT8XXX2_IRQ_WU90   87
 
#define IT8XXX2_IRQ_WU80   88
 
#define IT8XXX2_IRQ_WU81   89
 
#define IT8XXX2_IRQ_WU82   90
 
#define IT8XXX2_IRQ_WU83   91
 
#define IT8XXX2_IRQ_WU84   92
 
#define IT8XXX2_IRQ_WU85   93
 
#define IT8XXX2_IRQ_WU86   94
 
#define IT8XXX2_IRQ_WU87   95
 
#define IT8XXX2_IRQ_WU91   96
 
#define IT8XXX2_IRQ_WU92   97
 
#define IT8XXX2_IRQ_WU93   98
 
#define IT8XXX2_IRQ_WU94   99
 
#define IT8XXX2_IRQ_WU95   100
 
#define IT8XXX2_IRQ_WU96   101
 
#define IT8XXX2_IRQ_WU97   102
 
#define IT8XXX2_IRQ_WU98   103
 
#define IT8XXX2_IRQ_WU99   104
 
#define IT8XXX2_IRQ_WU100   105
 
#define IT8XXX2_IRQ_WU101   106
 
#define IT8XXX2_IRQ_WU102   107
 
#define IT8XXX2_IRQ_WU103   108
 
#define IT8XXX2_IRQ_WU104   109
 
#define IT8XXX2_IRQ_WU105   110
 
#define IT8XXX2_IRQ_WU106   111
 
#define IT8XXX2_IRQ_WU107   112
 
#define IT8XXX2_IRQ_WU108   113
 
#define IT8XXX2_IRQ_WU109   114
 
#define IT8XXX2_IRQ_WU110   115
 
#define IT8XXX2_IRQ_WU111   116
 
#define IT8XXX2_IRQ_WU112   117
 
#define IT8XXX2_IRQ_WU113   118
 
#define IT8XXX2_IRQ_WU114   119
 
#define IT8XXX2_IRQ_WU115   120
 
#define IT8XXX2_IRQ_WU116   121
 
#define IT8XXX2_IRQ_WU117   122
 
#define IT8XXX2_IRQ_WU118   123
 
#define IT8XXX2_IRQ_WU119   124
 
#define IT8XXX2_IRQ_WU120   125
 
#define IT8XXX2_IRQ_WU121   126
 
#define IT8XXX2_IRQ_WU122   127
 
#define IT8XXX2_IRQ_WU128   128
 
#define IT8XXX2_IRQ_WU129   129
 
#define IT8XXX2_IRQ_WU130   130
 
#define IT8XXX2_IRQ_WU131   131
 
#define IT8XXX2_IRQ_WU132   132
 
#define IT8XXX2_IRQ_WU133   133
 
#define IT8XXX2_IRQ_WU134   134
 
#define IT8XXX2_IRQ_WU135   135
 
#define IT8XXX2_IRQ_WU136   136
 
#define IT8XXX2_IRQ_WU137   137
 
#define IT8XXX2_IRQ_WU138   138
 
#define IT8XXX2_IRQ_WU139   139
 
#define IT8XXX2_IRQ_WU140   140
 
#define IT8XXX2_IRQ_WU141   141
 
#define IT8XXX2_IRQ_WU142   142
 
#define IT8XXX2_IRQ_WU143   143
 
#define IT8XXX2_IRQ_WU123   144
 
#define IT8XXX2_IRQ_WU124   145
 
#define IT8XXX2_IRQ_WU125   146
 
#define IT8XXX2_IRQ_WU126   147
 
#define IT8XXX2_IRQ_V_CMP   151
 
#define IT8XXX2_IRQ_SMB_E   152
 
#define IT8XXX2_IRQ_SMB_F   153
 
#define IT8XXX2_IRQ_TIMER3   155
 
#define IT8XXX2_IRQ_TIMER4   156
 
#define IT8XXX2_IRQ_TIMER5   157
 
#define IT8XXX2_IRQ_TIMER6   158
 
#define IT8XXX2_IRQ_TIMER7   159
 
#define IT8XXX2_IRQ_ESPI   162
 
#define IT8XXX2_IRQ_ESPI_VW   163
 
#define IT8XXX2_IRQ_PCH_P80   164
 
#define IT8XXX2_IRQ_USBPD0   165
 
#define IT8XXX2_IRQ_USBPD1   166
 
#define IT8XXX2_IRQ_USBPD2   174
 
#define IT8XXX2_IRQ_WU40   176
 
#define IT8XXX2_IRQ_WU45   177
 
#define IT8XXX2_IRQ_WU46   178
 
#define IT8XXX2_IRQ_WU144   179
 
#define IT8XXX2_IRQ_WU145   180
 
#define IT8XXX2_IRQ_WU146   181
 
#define IT8XXX2_IRQ_WU147   182
 
#define IT8XXX2_IRQ_WU148   183
 
#define IT8XXX2_IRQ_WU149   184
 
#define IT8XXX2_IRQ_WU150   185
 
#define IT8XXX2_IRQ_COUNT   (CONFIG_NUM_IRQS + 1)
 

Macro Definition Documentation

◆ IRQ_TYPE_EDGE_BOTH

#define IRQ_TYPE_EDGE_BOTH   (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)

◆ IRQ_TYPE_EDGE_FALLING

#define IRQ_TYPE_EDGE_FALLING   2

◆ IRQ_TYPE_EDGE_RISING

#define IRQ_TYPE_EDGE_RISING   1

◆ IRQ_TYPE_LEVEL_HIGH

#define IRQ_TYPE_LEVEL_HIGH   4

◆ IRQ_TYPE_LEVEL_LOW

#define IRQ_TYPE_LEVEL_LOW   8

◆ IRQ_TYPE_NONE

#define IRQ_TYPE_NONE   0

◆ IT8XXX2_IRQ_COUNT

#define IT8XXX2_IRQ_COUNT   (CONFIG_NUM_IRQS + 1)

◆ IT8XXX2_IRQ_ESPI

#define IT8XXX2_IRQ_ESPI   162

◆ IT8XXX2_IRQ_ESPI_VW

#define IT8XXX2_IRQ_ESPI_VW   163

◆ IT8XXX2_IRQ_KBC_IBF

#define IT8XXX2_IRQ_KBC_IBF   24

◆ IT8XXX2_IRQ_KBC_OBE

#define IT8XXX2_IRQ_KBC_OBE   2

◆ IT8XXX2_IRQ_PCH_P80

#define IT8XXX2_IRQ_PCH_P80   164

◆ IT8XXX2_IRQ_PMC1_IBF

#define IT8XXX2_IRQ_PMC1_IBF   25

◆ IT8XXX2_IRQ_PMC2_IBF

#define IT8XXX2_IRQ_PMC2_IBF   27

◆ IT8XXX2_IRQ_SMB_A

#define IT8XXX2_IRQ_SMB_A   9

◆ IT8XXX2_IRQ_SMB_B

#define IT8XXX2_IRQ_SMB_B   10

◆ IT8XXX2_IRQ_SMB_C

#define IT8XXX2_IRQ_SMB_C   16

◆ IT8XXX2_IRQ_SMB_D

#define IT8XXX2_IRQ_SMB_D   4

◆ IT8XXX2_IRQ_SMB_E

#define IT8XXX2_IRQ_SMB_E   152

◆ IT8XXX2_IRQ_SMB_F

#define IT8XXX2_IRQ_SMB_F   153

◆ IT8XXX2_IRQ_TIMER1

#define IT8XXX2_IRQ_TIMER1   30

◆ IT8XXX2_IRQ_TIMER2

#define IT8XXX2_IRQ_TIMER2   58

◆ IT8XXX2_IRQ_TIMER3

#define IT8XXX2_IRQ_TIMER3   155

◆ IT8XXX2_IRQ_TIMER4

#define IT8XXX2_IRQ_TIMER4   156

◆ IT8XXX2_IRQ_TIMER5

#define IT8XXX2_IRQ_TIMER5   157

◆ IT8XXX2_IRQ_TIMER6

#define IT8XXX2_IRQ_TIMER6   158

◆ IT8XXX2_IRQ_TIMER7

#define IT8XXX2_IRQ_TIMER7   159

◆ IT8XXX2_IRQ_TIMER8

#define IT8XXX2_IRQ_TIMER8   80

◆ IT8XXX2_IRQ_USB

#define IT8XXX2_IRQ_USB   23

◆ IT8XXX2_IRQ_USBPD0

#define IT8XXX2_IRQ_USBPD0   165

◆ IT8XXX2_IRQ_USBPD1

#define IT8XXX2_IRQ_USBPD1   166

◆ IT8XXX2_IRQ_USBPD2

#define IT8XXX2_IRQ_USBPD2   174

◆ IT8XXX2_IRQ_V_CMP

#define IT8XXX2_IRQ_V_CMP   151

◆ IT8XXX2_IRQ_WKINTC

#define IT8XXX2_IRQ_WKINTC   13

◆ IT8XXX2_IRQ_WKINTD

#define IT8XXX2_IRQ_WKINTD   5

◆ IT8XXX2_IRQ_WU100

#define IT8XXX2_IRQ_WU100   105

◆ IT8XXX2_IRQ_WU101

#define IT8XXX2_IRQ_WU101   106

◆ IT8XXX2_IRQ_WU102

#define IT8XXX2_IRQ_WU102   107

◆ IT8XXX2_IRQ_WU103

#define IT8XXX2_IRQ_WU103   108

◆ IT8XXX2_IRQ_WU104

#define IT8XXX2_IRQ_WU104   109

◆ IT8XXX2_IRQ_WU105

#define IT8XXX2_IRQ_WU105   110

◆ IT8XXX2_IRQ_WU106

#define IT8XXX2_IRQ_WU106   111

◆ IT8XXX2_IRQ_WU107

#define IT8XXX2_IRQ_WU107   112

◆ IT8XXX2_IRQ_WU108

#define IT8XXX2_IRQ_WU108   113

◆ IT8XXX2_IRQ_WU109

#define IT8XXX2_IRQ_WU109   114

◆ IT8XXX2_IRQ_WU110

#define IT8XXX2_IRQ_WU110   115

◆ IT8XXX2_IRQ_WU111

#define IT8XXX2_IRQ_WU111   116

◆ IT8XXX2_IRQ_WU112

#define IT8XXX2_IRQ_WU112   117

◆ IT8XXX2_IRQ_WU113

#define IT8XXX2_IRQ_WU113   118

◆ IT8XXX2_IRQ_WU114

#define IT8XXX2_IRQ_WU114   119

◆ IT8XXX2_IRQ_WU115

#define IT8XXX2_IRQ_WU115   120

◆ IT8XXX2_IRQ_WU116

#define IT8XXX2_IRQ_WU116   121

◆ IT8XXX2_IRQ_WU117

#define IT8XXX2_IRQ_WU117   122

◆ IT8XXX2_IRQ_WU118

#define IT8XXX2_IRQ_WU118   123

◆ IT8XXX2_IRQ_WU119

#define IT8XXX2_IRQ_WU119   124

◆ IT8XXX2_IRQ_WU120

#define IT8XXX2_IRQ_WU120   125

◆ IT8XXX2_IRQ_WU121

#define IT8XXX2_IRQ_WU121   126

◆ IT8XXX2_IRQ_WU122

#define IT8XXX2_IRQ_WU122   127

◆ IT8XXX2_IRQ_WU123

#define IT8XXX2_IRQ_WU123   144

◆ IT8XXX2_IRQ_WU124

#define IT8XXX2_IRQ_WU124   145

◆ IT8XXX2_IRQ_WU125

#define IT8XXX2_IRQ_WU125   146

◆ IT8XXX2_IRQ_WU126

#define IT8XXX2_IRQ_WU126   147

◆ IT8XXX2_IRQ_WU128

#define IT8XXX2_IRQ_WU128   128

◆ IT8XXX2_IRQ_WU129

#define IT8XXX2_IRQ_WU129   129

◆ IT8XXX2_IRQ_WU130

#define IT8XXX2_IRQ_WU130   130

◆ IT8XXX2_IRQ_WU131

#define IT8XXX2_IRQ_WU131   131

◆ IT8XXX2_IRQ_WU132

#define IT8XXX2_IRQ_WU132   132

◆ IT8XXX2_IRQ_WU133

#define IT8XXX2_IRQ_WU133   133

◆ IT8XXX2_IRQ_WU134

#define IT8XXX2_IRQ_WU134   134

◆ IT8XXX2_IRQ_WU135

#define IT8XXX2_IRQ_WU135   135

◆ IT8XXX2_IRQ_WU136

#define IT8XXX2_IRQ_WU136   136

◆ IT8XXX2_IRQ_WU137

#define IT8XXX2_IRQ_WU137   137

◆ IT8XXX2_IRQ_WU138

#define IT8XXX2_IRQ_WU138   138

◆ IT8XXX2_IRQ_WU139

#define IT8XXX2_IRQ_WU139   139

◆ IT8XXX2_IRQ_WU140

#define IT8XXX2_IRQ_WU140   140

◆ IT8XXX2_IRQ_WU141

#define IT8XXX2_IRQ_WU141   141

◆ IT8XXX2_IRQ_WU142

#define IT8XXX2_IRQ_WU142   142

◆ IT8XXX2_IRQ_WU143

#define IT8XXX2_IRQ_WU143   143

◆ IT8XXX2_IRQ_WU144

#define IT8XXX2_IRQ_WU144   179

◆ IT8XXX2_IRQ_WU145

#define IT8XXX2_IRQ_WU145   180

◆ IT8XXX2_IRQ_WU146

#define IT8XXX2_IRQ_WU146   181

◆ IT8XXX2_IRQ_WU147

#define IT8XXX2_IRQ_WU147   182

◆ IT8XXX2_IRQ_WU148

#define IT8XXX2_IRQ_WU148   183

◆ IT8XXX2_IRQ_WU149

#define IT8XXX2_IRQ_WU149   184

◆ IT8XXX2_IRQ_WU150

#define IT8XXX2_IRQ_WU150   185

◆ IT8XXX2_IRQ_WU20

#define IT8XXX2_IRQ_WU20   1

◆ IT8XXX2_IRQ_WU21

#define IT8XXX2_IRQ_WU21   31

◆ IT8XXX2_IRQ_WU22

#define IT8XXX2_IRQ_WU22   21

◆ IT8XXX2_IRQ_WU23

#define IT8XXX2_IRQ_WU23   6

◆ IT8XXX2_IRQ_WU24

#define IT8XXX2_IRQ_WU24   17

◆ IT8XXX2_IRQ_WU25

#define IT8XXX2_IRQ_WU25   14

◆ IT8XXX2_IRQ_WU26

#define IT8XXX2_IRQ_WU26   12

◆ IT8XXX2_IRQ_WU40

#define IT8XXX2_IRQ_WU40   176

◆ IT8XXX2_IRQ_WU45

#define IT8XXX2_IRQ_WU45   177

◆ IT8XXX2_IRQ_WU46

#define IT8XXX2_IRQ_WU46   178

◆ IT8XXX2_IRQ_WU50

#define IT8XXX2_IRQ_WU50   40

◆ IT8XXX2_IRQ_WU51

#define IT8XXX2_IRQ_WU51   41

◆ IT8XXX2_IRQ_WU52

#define IT8XXX2_IRQ_WU52   42

◆ IT8XXX2_IRQ_WU53

#define IT8XXX2_IRQ_WU53   43

◆ IT8XXX2_IRQ_WU54

#define IT8XXX2_IRQ_WU54   44

◆ IT8XXX2_IRQ_WU55

#define IT8XXX2_IRQ_WU55   45

◆ IT8XXX2_IRQ_WU56

#define IT8XXX2_IRQ_WU56   46

◆ IT8XXX2_IRQ_WU57

#define IT8XXX2_IRQ_WU57   47

◆ IT8XXX2_IRQ_WU60

#define IT8XXX2_IRQ_WU60   48

◆ IT8XXX2_IRQ_WU61

#define IT8XXX2_IRQ_WU61   49

◆ IT8XXX2_IRQ_WU62

#define IT8XXX2_IRQ_WU62   50

◆ IT8XXX2_IRQ_WU63

#define IT8XXX2_IRQ_WU63   51

◆ IT8XXX2_IRQ_WU64

#define IT8XXX2_IRQ_WU64   52

◆ IT8XXX2_IRQ_WU65

#define IT8XXX2_IRQ_WU65   53

◆ IT8XXX2_IRQ_WU66

#define IT8XXX2_IRQ_WU66   54

◆ IT8XXX2_IRQ_WU67

#define IT8XXX2_IRQ_WU67   55

◆ IT8XXX2_IRQ_WU70

#define IT8XXX2_IRQ_WU70   72

◆ IT8XXX2_IRQ_WU71

#define IT8XXX2_IRQ_WU71   73

◆ IT8XXX2_IRQ_WU72

#define IT8XXX2_IRQ_WU72   74

◆ IT8XXX2_IRQ_WU73

#define IT8XXX2_IRQ_WU73   75

◆ IT8XXX2_IRQ_WU74

#define IT8XXX2_IRQ_WU74   76

◆ IT8XXX2_IRQ_WU75

#define IT8XXX2_IRQ_WU75   77

◆ IT8XXX2_IRQ_WU76

#define IT8XXX2_IRQ_WU76   78

◆ IT8XXX2_IRQ_WU77

#define IT8XXX2_IRQ_WU77   79

◆ IT8XXX2_IRQ_WU80

#define IT8XXX2_IRQ_WU80   88

◆ IT8XXX2_IRQ_WU81

#define IT8XXX2_IRQ_WU81   89

◆ IT8XXX2_IRQ_WU82

#define IT8XXX2_IRQ_WU82   90

◆ IT8XXX2_IRQ_WU83

#define IT8XXX2_IRQ_WU83   91

◆ IT8XXX2_IRQ_WU84

#define IT8XXX2_IRQ_WU84   92

◆ IT8XXX2_IRQ_WU85

#define IT8XXX2_IRQ_WU85   93

◆ IT8XXX2_IRQ_WU86

#define IT8XXX2_IRQ_WU86   94

◆ IT8XXX2_IRQ_WU87

#define IT8XXX2_IRQ_WU87   95

◆ IT8XXX2_IRQ_WU88

#define IT8XXX2_IRQ_WU88   85

◆ IT8XXX2_IRQ_WU89

#define IT8XXX2_IRQ_WU89   86

◆ IT8XXX2_IRQ_WU90

#define IT8XXX2_IRQ_WU90   87

◆ IT8XXX2_IRQ_WU91

#define IT8XXX2_IRQ_WU91   96

◆ IT8XXX2_IRQ_WU92

#define IT8XXX2_IRQ_WU92   97

◆ IT8XXX2_IRQ_WU93

#define IT8XXX2_IRQ_WU93   98

◆ IT8XXX2_IRQ_WU94

#define IT8XXX2_IRQ_WU94   99

◆ IT8XXX2_IRQ_WU95

#define IT8XXX2_IRQ_WU95   100

◆ IT8XXX2_IRQ_WU96

#define IT8XXX2_IRQ_WU96   101

◆ IT8XXX2_IRQ_WU97

#define IT8XXX2_IRQ_WU97   102

◆ IT8XXX2_IRQ_WU98

#define IT8XXX2_IRQ_WU98   103

◆ IT8XXX2_IRQ_WU99

#define IT8XXX2_IRQ_WU99   104