Go to the source code of this file.
◆ NXP_S32_IMCR_IDX_MASK
#define NXP_S32_IMCR_IDX_MASK BIT_MASK(9) |
◆ NXP_S32_IMCR_IDX_SHIFT
#define NXP_S32_IMCR_IDX_SHIFT 7U |
◆ NXP_S32_IMCR_SIUL2_IDX_MASK
#define NXP_S32_IMCR_SIUL2_IDX_MASK BIT_MASK(3) |
◆ NXP_S32_IMCR_SIUL2_IDX_SHIFT
#define NXP_S32_IMCR_SIUL2_IDX_SHIFT 28U |
◆ NXP_S32_IMCR_SSS_MASK
#define NXP_S32_IMCR_SSS_MASK BIT_MASK(4) |
◆ NXP_S32_IMCR_SSS_SHIFT
#define NXP_S32_IMCR_SSS_SHIFT 3U |
◆ NXP_S32_MSCR_IDX_MASK
#define NXP_S32_MSCR_IDX_MASK BIT_MASK(9) |
◆ NXP_S32_MSCR_IDX_SHIFT
#define NXP_S32_MSCR_IDX_SHIFT 16U |
◆ NXP_S32_MSCR_SIUL2_IDX_MASK
#define NXP_S32_MSCR_SIUL2_IDX_MASK BIT_MASK(3) |
◆ NXP_S32_MSCR_SIUL2_IDX_SHIFT
#define NXP_S32_MSCR_SIUL2_IDX_SHIFT 25U |
◆ NXP_S32_MSCR_SSS_MASK
#define NXP_S32_MSCR_SSS_MASK BIT_MASK(3) |
◆ NXP_S32_MSCR_SSS_SHIFT
#define NXP_S32_MSCR_SSS_SHIFT 0U |
◆ NXP_S32_PINMUX
#define NXP_S32_PINMUX |
( |
| mscr_siul2_idx, |
|
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| imcr_siul2_idx, |
|
|
| mscr_idx, |
|
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| mscr_sss, |
|
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| imcr_idx, |
|
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| imcr_sss ) |
Value:
NXP_S32_PINMUX_IMCR_SIUL2_IDX(imcr_siul2_idx) | \
NXP_S32_PINMUX_MSCR_IDX(mscr_idx) | \
NXP_S32_PINMUX_MSCR_SSS(mscr_sss) | \
NXP_S32_PINMUX_IMCR_IDX(imcr_idx) | \
NXP_S32_PINMUX_IMCR_SSS(imcr_sss))
#define NXP_S32_PINMUX_MSCR_SIUL2_IDX(cfg)
Definition nxp-s32-pinctrl.h:48
Utility macro to build NXP S32 pinmux property for pinctrl nodes.
- Parameters
-
mscr_siul2_idx | MSCR SIUL2 instance index |
imcr_siul2_idx | IMCR SIUL2 instance index |
mscr_idx | Multiplexed Signal Configuration Register (MSCR) index |
mscr_sss | Output mux Source Signal Selection (MSCR.SSS) |
imcr_idx | Input Multiplexed Signal Configuration Register (IMCR) index |
imcr_sss | Input mux Source Signal Selection (IMCR.SSS) |
◆ NXP_S32_PINMUX_GET_IMCR_IDX
#define NXP_S32_PINMUX_GET_IMCR_IDX |
( |
| cfg | ) |
|
Value:
#define NXP_S32_IMCR_IDX_MASK
Definition nxp-s32-pinctrl.h:28
#define NXP_S32_IMCR_IDX_SHIFT
Definition nxp-s32-pinctrl.h:27
◆ NXP_S32_PINMUX_GET_IMCR_SIUL2_IDX
#define NXP_S32_PINMUX_GET_IMCR_SIUL2_IDX |
( |
| cfg | ) |
|
Value:
#define NXP_S32_IMCR_SIUL2_IDX_MASK
Definition nxp-s32-pinctrl.h:34
#define NXP_S32_IMCR_SIUL2_IDX_SHIFT
Definition nxp-s32-pinctrl.h:33
◆ NXP_S32_PINMUX_GET_IMCR_SSS
#define NXP_S32_PINMUX_GET_IMCR_SSS |
( |
| cfg | ) |
|
Value:
#define NXP_S32_IMCR_SSS_MASK
Definition nxp-s32-pinctrl.h:26
#define NXP_S32_IMCR_SSS_SHIFT
Definition nxp-s32-pinctrl.h:25
◆ NXP_S32_PINMUX_GET_MSCR_IDX
#define NXP_S32_PINMUX_GET_MSCR_IDX |
( |
| cfg | ) |
|
Value:
#define NXP_S32_MSCR_IDX_MASK
Definition nxp-s32-pinctrl.h:30
#define NXP_S32_MSCR_IDX_SHIFT
Definition nxp-s32-pinctrl.h:29
◆ NXP_S32_PINMUX_GET_MSCR_SIUL2_IDX
#define NXP_S32_PINMUX_GET_MSCR_SIUL2_IDX |
( |
| cfg | ) |
|
Value:
#define NXP_S32_MSCR_SIUL2_IDX_MASK
Definition nxp-s32-pinctrl.h:32
#define NXP_S32_MSCR_SIUL2_IDX_SHIFT
Definition nxp-s32-pinctrl.h:31
◆ NXP_S32_PINMUX_GET_MSCR_SSS
#define NXP_S32_PINMUX_GET_MSCR_SSS |
( |
| cfg | ) |
|
Value:
#define NXP_S32_MSCR_SSS_SHIFT
Definition nxp-s32-pinctrl.h:23
#define NXP_S32_MSCR_SSS_MASK
Definition nxp-s32-pinctrl.h:24
◆ NXP_S32_PINMUX_IMCR_IDX
#define NXP_S32_PINMUX_IMCR_IDX |
( |
| cfg | ) |
|
◆ NXP_S32_PINMUX_IMCR_SIUL2_IDX
#define NXP_S32_PINMUX_IMCR_SIUL2_IDX |
( |
| cfg | ) |
|
◆ NXP_S32_PINMUX_IMCR_SSS
#define NXP_S32_PINMUX_IMCR_SSS |
( |
| cfg | ) |
|
◆ NXP_S32_PINMUX_MSCR_IDX
#define NXP_S32_PINMUX_MSCR_IDX |
( |
| cfg | ) |
|
◆ NXP_S32_PINMUX_MSCR_SIUL2_IDX
#define NXP_S32_PINMUX_MSCR_SIUL2_IDX |
( |
| cfg | ) |
|
◆ NXP_S32_PINMUX_MSCR_SSS
#define NXP_S32_PINMUX_MSCR_SSS |
( |
| cfg | ) |
|