Go to the source code of this file.
◆ RA_MODE_MASK
◆ RA_MODE_POS
◆ RA_PIN_NUM_MASK
#define RA_PIN_NUM_MASK 0xf |
◆ RA_PIN_NUM_POS
◆ RA_PORT_NUM_MASK
#define RA_PORT_NUM_MASK 0xf |
◆ RA_PORT_NUM_POS
#define RA_PORT_NUM_POS 0 |
◆ RA_PSEL
#define RA_PSEL |
( |
| psel, |
|
|
| port_num, |
|
|
| pin_num ) |
Value:
#define RA_PIN_NUM_POS
Definition pinctrl-ra.h:13
#define RA_PORT_NUM_POS
Definition pinctrl-ra.h:10
#define RA_MODE_POS
Definition pinctrl-ra.h:50
#define RA_PSEL_POS
Definition pinctrl-ra.h:47
◆ RA_PSEL_ADC
◆ RA_PSEL_AGT
◆ RA_PSEL_BUS
◆ RA_PSEL_CAC_ADC
#define RA_PSEL_CAC_ADC 0xa |
◆ RA_PSEL_CANFD
#define RA_PSEL_CANFD 0x10 |
◆ RA_PSEL_CLKOUT_RTC
#define RA_PSEL_CLKOUT_RTC 0x9 |
◆ RA_PSEL_ETH_MII
#define RA_PSEL_ETH_MII 0x16 |
◆ RA_PSEL_ETH_RMII
#define RA_PSEL_ETH_RMII 0x17 |
◆ RA_PSEL_GLCDC
#define RA_PSEL_GLCDC 0x19 |
◆ RA_PSEL_GPT0
◆ RA_PSEL_GPT1
◆ RA_PSEL_HIZ_JTAG_SWD
#define RA_PSEL_HIZ_JTAG_SWD 0x0 |
◆ RA_PSEL_I2C
◆ RA_PSEL_MASK
#define RA_PSEL_MASK 0x1f |
◆ RA_PSEL_OSPI
#define RA_PSEL_OSPI 0x1c |
◆ RA_PSEL_POS
◆ RA_PSEL_QSPI
#define RA_PSEL_QSPI 0x11 |
◆ RA_PSEL_SCI_0
#define RA_PSEL_SCI_0 0x4 |
◆ RA_PSEL_SCI_1
#define RA_PSEL_SCI_1 0x5 |
◆ RA_PSEL_SCI_2
#define RA_PSEL_SCI_2 0x4 |
◆ RA_PSEL_SCI_3
#define RA_PSEL_SCI_3 0x5 |
◆ RA_PSEL_SCI_4
#define RA_PSEL_SCI_4 0x4 |
◆ RA_PSEL_SCI_5
#define RA_PSEL_SCI_5 0x5 |
◆ RA_PSEL_SCI_6
#define RA_PSEL_SCI_6 0x4 |
◆ RA_PSEL_SCI_7
#define RA_PSEL_SCI_7 0x5 |
◆ RA_PSEL_SCI_8
#define RA_PSEL_SCI_8 0x4 |
◆ RA_PSEL_SCI_9
#define RA_PSEL_SCI_9 0x5 |
◆ RA_PSEL_SDHI
#define RA_PSEL_SDHI 0x15 |
◆ RA_PSEL_SPI
◆ RA_PSEL_SSIE
#define RA_PSEL_SSIE 0x12 |
◆ RA_PSEL_USBFS
#define RA_PSEL_USBFS 0x13 |
◆ RA_PSEL_USBHS
#define RA_PSEL_USBHS 0x14 |