Zephyr API 3.6.99
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mpu.h File Reference
#include <stdint.h>
#include <zephyr/toolchain.h>
#include <zephyr/sys/util_macro.h>
#include <xtensa/config/core-isa.h>

Go to the source code of this file.

Data Structures

struct  xtensa_mpu_entry
 Foreground MPU Entry. More...
 
struct  xtensa_mpu_map
 Struct to hold foreground MPU map and its entries. More...
 
struct  xtensa_mpu_range
 Struct to describe a memory region [start, end). More...
 

Macros

#define XTENSA_MPU_NUM_ENTRIES   XCHAL_MPU_ENTRIES
 Number of available entries in the MPU table.
 
MPU memory region access rights.
Note
These are NOT bit masks, and must be used as whole value.
#define XTENSA_MPU_ACCESS_P_NA_U_NA   (0)
 Kernel and user modes no access.
 
#define XTENSA_MPU_ACCESS_P_X_U_NA   (2)
 Kernel mode execution only.
 
#define XTENSA_MPU_ACCESS_P_NA_U_X   (3)
 User mode execution only.
 
#define XTENSA_MPU_ACCESS_P_RO_U_NA   (4)
 Kernel mode read only.
 
#define XTENSA_MPU_ACCESS_P_RX_U_NA   (5)
 Kernel mode read and execution.
 
#define XTENSA_MPU_ACCESS_P_RW_U_NA   (6)
 Kernel mode read and write.
 
#define XTENSA_MPU_ACCESS_P_RWX_U_NA   (7)
 Kernel mode read, write and execution.
 
#define XTENSA_MPU_ACCESS_P_WO_U_WO   (8)
 Kernel and user modes write only.
 
#define XTENSA_MPU_ACCESS_P_RW_U_RWX   (9)
 Kernel mode read, write.
 
#define XTENSA_MPU_ACCESS_P_RW_U_RO   (10)
 Kernel mode read and write.
 
#define XTENSA_MPU_ACCESS_P_RWX_U_RX   (11)
 Kernel mode read, write and execution.
 
#define XTENSA_MPU_ACCESS_P_RO_U_RO   (12)
 Kernel and user modes read only.
 
#define XTENSA_MPU_ACCESS_P_RX_U_RX   (13)
 Kernel and user modes read and execution.
 
#define XTENSA_MPU_ACCESS_P_RW_U_RW   (14)
 Kernel and user modes read and write.
 
#define XTENSA_MPU_ACCESS_P_RWX_U_RWX   (15)
 Kernel and user modes read, write and execution.
 

Functions

void xtensa_mpu_init (void)
 Initialize hardware MPU.
 

Variables

const struct xtensa_mpu_range xtensa_soc_mpu_ranges []
 Additional memory regions required by SoC.
 
const int xtensa_soc_mpu_ranges_num
 Number of SoC additional memory regions.
 

Memory domain and partitions

#define K_MEM_PARTITION_IS_EXECUTABLE(access_rights)
 
#define K_MEM_PARTITION_IS_WRITABLE(access_rights)
 
#define K_MEM_PARTITION_P_RW_U_RW    ((k_mem_partition_attr_t) {XTENSA_MPU_ACCESS_P_RW_U_RW})
 
#define K_MEM_PARTITION_P_RW_U_NA    ((k_mem_partition_attr_t) {XTENSA_MPU_ACCESS_P_RW_U_NA})
 
#define K_MEM_PARTITION_P_RO_U_RO    ((k_mem_partition_attr_t) {XTENSA_MPU_ACCESS_P_RO_U_RO})
 
#define K_MEM_PARTITION_P_RO_U_NA    ((k_mem_partition_attr_t) {XTENSA_MPU_ACCESS_P_RO_U_NA})
 
#define K_MEM_PARTITION_P_NA_U_NA    ((k_mem_partition_attr_t) {XTENSA_MPU_ACCESS_P_NA_U_NA})
 
#define K_MEM_PARTITION_P_RX_U_RX    ((k_mem_partition_attr_t) {XTENSA_MPU_ACCESS_P_RX_U_RX})
 
static bool xtensa_mem_partition_is_executable (k_mem_partition_attr_t access_rights)
 
static bool xtensa_mem_partition_is_writable (k_mem_partition_attr_t access_rights)